The Storage and Memory Signal

Direction: Worsening.

This period: TrendForce logged 2Q26 DRAM industry revenue at $154.73 billion, up 59.5% quarter over quarter, explicitly attributing the jump to supply expansion continuing to lag demand growth with supplier inventories at historic lows. Enterprise SSD vendor revenue told a similar story, up 103.6% QoQ to $37.59 billion combined across the top five. The counter-signal: DeepSeek's September 10 release of V4.1 Flash claims a 75% cut in HBM need and an 87.5% cut in SSD need for its key-value cache versus its own prior architecture, which knocked Samsung and SK hynix shares down in Seoul trading on September 11, the first credible demand-side pushback this shortage narrative has faced.

Driver: AI hyperscaler demand for DRAM, NAND, and HBM is outrunning capacity even as suppliers post record revenue; HBM production is still reallocating fab capacity away from conventional DRAM and NAND, tightening both further, per TrendForce's own framing of the 2Q26 numbers.

Watch for: Whether DeepSeek's more efficient KV-cache architecture gets replicated by other frontier labs at scale and actually shows up in bulk order data, alongside Q3/Q4 2026 capacity guidance from Samsung, SK hynix, and Micron.

DeepSeek released V4.1 Flash on September 10, and unlike most model launches this year, the number everyone latched onto wasn't a benchmark score. It was a memory figure. The company says the model's key-value cache, the running record of attention state an AI system keeps for every token in a conversation, needs 75% less HBM and 87.5% less SSD capacity than DeepSeek's own prior-generation architecture required to do the same job. Samsung fell 3.5% and SK hynix fell 2.2% in Seoul trading the next day. Micron and SanDisk shares held steady in the US, helped along by unrelated news that Micron was handing its Taiwan workforce record bonuses the same day, but the Korean pair's exposure to HBM specifically is exactly why they moved and the American pair didn't.

The mechanism is worth walking through because it's more specific than "we made it smaller." CSA2, short for Compressed Sparse Attention 2, assigns each attention layer a static mode, Full, Reindex, or Reuse, so layers share KV data and reuse sparse-attention indices instead of recomputing them from scratch. On top of that sits FP4 quantization in the E2M1 format with per-16-channel scaling, squeezing the cache further without a separate quantization pass. A third technique, which DeepSeek calls SWA Bounded Replay, handles sliding-window attention by replaying just the most recent token window to reconstruct context, skipping the SSD round-trip that a naive implementation would need. Stack all three and DeepSeek gets to an 890-byte-per-token footprint, about a quarter of what V4 Flash needed and a small fraction of what the original V1 needed.

Read the claim for exactly what it says, not more. This is a reduction in KV cache footprint during inference, not a claim that the whole model or an entire data center now runs on a quarter of the memory. And the comparison is against DeepSeek's own prior generation, not against Nvidia's reference stack or any competitor's architecture. The model also only leads rivals on "certain coding and AI agent-related benchmarks," per DeepSeek's own framing, not across the board. None of that makes the underlying engineering less real. It just means the headline percentages describe one company's internal improvement, not an industry baseline shift.

What makes this issue's news cycle interesting is how directly it argues with a run of stories this newsletter has already covered. Issue 02's Uplevel Highlight explained KV cache and covered Nvidia's ICMSP standard for pushing overflow cache out to NVMe. Issue 05 covered Kioxia's plan to pair fast NAND with a CXL controller as a partial DRAM substitute. Issue 06's Second Cut covered Silicon Motion pitching enterprise SSDs as a persistent memory tier built specifically to hold KV cache that outgrows onboard HBM. Every one of those stories assumed the cache keeps growing and that the fix is a bigger, cheaper tier to park it in. DeepSeek's architecture attacks the premise directly: shrink the cache instead of building more places to put it.

Whether that argument wins is a separate question from whether it's true. AI efficiency gains have a track record of getting absorbed by more usage rather than shrinking aggregate demand; cheaper inference tends to invite more inference, not less total memory consumption industry-wide. And this is one lab's claim about its own model. What would actually move bulk HBM and NAND orders is OpenAI, Anthropic, Google, or Meta adopting comparable cache-shrinking tricks at their own frontier scale, not one efficient release from one lab. But this is the first genuinely quantified, named-technique challenge this shortage cycle has had to answer, and a 3.5% one-day stock move, muted as it looks against a year of relentless gains, is the market saying the thesis isn't bulletproof either.

Counterpoint Research's Q2 2026 DRAM tracker, reported September 3, put ChangXin Memory Technologies at a 10% global bit-share, up from 4% a year earlier, behind Samsung's 38%, SK hynix's 25%, and Micron's 24%. Share gains from a Chinese supplier operating under a full US export-control regime aren't new; this newsletter noted CXMT's rise in earlier issues. What's new, and harder to wave off, is the profitability figure TrendForce published four days earlier.

An 87.6% gross margin, ahead of two of the three merchant DRAM incumbents, from a company restricted to older lithography tools, is the real story here, not the share number by itself. Some caution belongs in that read. CXMT only listed on Shanghai's STAR Market in July, so its numbers haven't been tested across a full pricing cycle yet, and the same industry-wide ASP surge lifting Samsung's, SK hynix's, and Micron's margins this quarter is lifting CXMT's too. An 873.64% year-over-year revenue jump is also easier to post off a small base than a large one. None of that erases the margin comparison, but it argues for treating this as one very strong quarter rather than proof CXMT has closed the operational gap with the incumbents for good.

The LPDDR6 claims are where the story gets genuinely murky. CXMT's own language is cautious, sampling with key customers, accelerating preparations. Reuters reports mass production is already underway specifically for Xiaomi's upcoming 18 Fold, and Xiaomi founder Lei Jun has publicly confirmed that phone will be the first to ship with the new memory. That's a real gap between what the company says about itself and what its own customer's supply chain appears to already be doing. Independent analysts quoted alongside the story flagged that yields and volumes remain undisclosed either way, which is the detail that actually matters before anyone calls this parity with Samsung or SK hynix.